555 Timer Astable

Formula

Description

The 555 timer in astable mode generates a continuous rectangular wave without external triggering. The capacitor charges through R1 + R2 and discharges through R2 alone, creating an asymmetric waveform. The duty cycle is (R1 + R2) / (R1 + 2×R2), which is always greater than 50% in the standard configuration. For a near-50% duty cycle, make R1 much smaller than R2. The 555 is one of the most versatile ICs ever made, used for timing, pulse generation, clock signals, PWM, and tone generation in countless applications since its introduction in 1972.

Variables

• f — Output frequency (Hz)
• R1 — Timing resistor between Vcc and discharge pin (Ω)
• R2 — Timing resistor between discharge and threshold pins (Ω)
• C — Timing capacitor (F)

Practical Notes

For stable operation, R1 and R2 should be between 1kΩ and 10MΩ. The CMOS 555 (TLC555, LMC555) draws much less supply current than the original bipolar NE555 and works at lower voltages (2-15V). For 50% duty cycle, add a diode across R2 to bypass it during charge, or use the 555 in toggle mode with a divide-by-2 flip-flop.