Controlled Impedance Tolerance

ΔZ/Z = √((Δh/h)² + (Δw/w)² + (Δεr/εr)²)

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Result

Formula

ΔZ/Z = √((Δh/h)² + (Δw/w)² + (Δεr/εr)²)

Description

The impedance of a controlled-impedance trace depends on the dielectric thickness (h), trace width (w), and dielectric constant (εr). Manufacturing variations in each parameter contribute to the total impedance tolerance. Assuming the errors are independent and normally distributed, the RSS (root sum of squares) combination gives the expected total impedance variation. Typical PCB fabrication tolerances: dielectric thickness ±10%, trace width ±10-20% (depending on process), εr ±5%. The resulting impedance tolerance is typically ±10% for standard processes and ±5% for controlled-impedance specified boards.

Variables

  • Δh/h — Relative tolerance of dielectric thickness (ratio)
  • Δw/w — Relative tolerance of trace width (ratio)
  • Δεr/εr — Relative tolerance of dielectric constant (ratio)

Practical Notes

The result is the relative impedance tolerance (ratio). Multiply by 100 for percentage. For a 50 Ω trace with Δh/h = 0.10, Δw/w = 0.15, Δεr/εr = 0.05: ΔZ/Z = √(0.01 + 0.0225 + 0.0025) ≈ 0.187 = 18.7%. This means the impedance could range from about 40.7 to 59.3 Ω. Impedance coupons (test structures) on the panel edge allow direct measurement and verification of the achieved impedance.

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