SMPS Output Voltage Ripple
ΔV = Iout × D × (1−D) / (f × C)
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Formula
Description
Output voltage ripple in a switching power supply is caused by the inductor ripple current charging and discharging the output capacitor. Lower ripple requires higher switching frequency, more output capacitance, or both. The ripple is maximum at D = 0.5 and decreases toward both extremes of duty cycle. This simplified formula assumes ideal capacitors; in practice, ESR of the capacitor often contributes more to ripple than the capacitive term, especially with electrolytic capacitors. Use low-ESR ceramic capacitors for best ripple performance.
Variables
- ΔV — Peak-to-peak output voltage ripple (V)
- Iout — Output load current (A)
- D — Duty cycle (0 to 1)
- f — Switching frequency (Hz)
- C — Output capacitance (F)
Practical Notes
Total ripple = capacitive ripple + ESR ripple. ESR ripple = ΔI_inductor × ESR. For ceramic output capacitors, the capacitive term dominates. For electrolytic capacitors, ESR usually dominates. Typical ripple targets are 1-3% of Vout. An LC post-filter can further reduce ripple by 20-40 dB for noise-sensitive loads.
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